Month: December 2018

LG

We're just a few weeks away from 2019's Consumer Electronics Show (CES), and some companies are drumming up hype by revealing some new products early. LG is one of them, as it announced the newest devices in its Gram family of thin-and-light laptops. Joining the lineup are a new 17-inch LG Gram, which the company claims to be the lightest 17-inch clamshell on the market, and the family's first 2-in-1 device in the form of the new 14-inch Gram convertible.

The mammoth 17-inch laptop appears to take most of its design from the original LG Gram, which Ars reviewed last year. It looks like a standard ultrabook, with a nearly edge-to-edge display and a slightly larger chin bezel. LG claims to have put a 17-inch display in a 15.6-inch chassis, but it's hard to tell how well that statement holds up through images alone.

Enlarge / 64 little grey boxes means 64 execution units, up from 24. (credit: Intel)

Intel is promising a huge improvement to the performance of its integrated GPUs. Its generation 11 ("Gen11") GPU will more than double the execution units from (usually) 24 to 64, and in so doing boost the number-crunching performance to more than 1 trillion floating point operations per second.

Just as the current Gen9 GPUs, Gen11 is arranged into blocks combining execution units (EUs) with dedicated 3D hardware such as texture samplers. Gen9 parts have up to 8 EUs per block, and the most-common configuration found in Intel's processors, GT2, has three such blocks for a total of 24 EUs (though there are designs with six or nine blocks, for 48 or 72 EUs). Gen11 has 16 EUs per block and will have configurations with four blocks. It's all these extra execution units that enable that headlining 1TFLOPS performance figure.

The new GPU will use a tile-based rendering approach, which divides the image into tiles that are all rendered separately. This tends to reduce the amount of memory bandwidth the GPU needs, which is valuable in integrated GPUs, as they lack the high-performance memory found in discrete parts. The Mali GPUs designed by ARM, along with Qualcomm's Adreno GPUs, both use tile-based rendering too.

OK, it's not all that sunny, but it's a nice picture of a cove. (credit: Neil Williamson)

In 2019, Intel will release Core and Xeon chips built around a new architecture: the chips will add a bunch of new instructions to accelerate certain popular workloads such as cryptography and compression, with the company demonstrating 75-percent improvement in compression performance relative to prior-generation parts.

Since 2015, Intel's mainstream processors under the Core and Xeon brands have been based around the Skylake architecture. Intel's original intent was to release Skylake on its 14nm manufacturing process and then follow that up with Cannon Lake on its 10nm process. Cannon Lake would add a handful of new features (it includes more AVX instructions, for example) but otherwise be broadly the same as Skylake.

However, delays in getting its 10nm manufacturing process running effectively forced Intel to stick with 14nm for longer than anticipated. Accordingly, the company followed Skylake (with its maximum of four cores in consumer systems) with Kaby Lake (with higher clock speeds and much greater hardware acceleration of modern video codecs), Coffee Lake (as many as eight cores), and Whiskey Lake (improved integrated chipset). The core Skylake architecture was unchanged across these variations, meaning that while their clock speeds differ, the number of instructions per cycle (IPC) is essentially identical.

Enlarge / P1274 is Intel's name for its high performance 10nm process. P1222 is its 22FFL (22nm, FinFET, Low Power) process, which is optimized for much lower current leakage. As well as the Foveros connection between the compute and I/O modules, the product will use conventional stacked Package-on-Package memory. (credit: Intel)

In 2019, Intel is going to ship chips using a new 3D stacking technology the company is calling Foveros. Foveros allows complex logic dies to be stacked upon one another, providing a much greater ability to mix and match processor components with optimal manufacturing processes.

Package-on-package stacking is already commonplace in the system-on-chip world. Typically, this involves sticking a memory package on top of a processor, with perhaps a few hundred connections between the two. The size and performance of the connections has limited the application of this technique. With Foveros, the interconnect will use etched silicon (just as EMIB does) to enable many more interconnections, running at much greater speeds.

Foveros follows on from Intel's EMIB (Embedded Multi-die Interconnect Bridge) tech. EMIB is found on the Kaby Lake-G processors that in a single package contain an Intel CPU, AMD GPU, and a chunk of second-generation High Bandwidth Memory (HBM). HBM achieves its high bandwidth by using thousands of interconnects between the GPU and its memory, in comparison to the several hundred used between a GPU and conventional GDDR. The Kaby Lake-G chips use EMIB to provide this connection.

Valentina Palladino

It has been six years since Dell first introduced its XPS Developer Edition moniker, which refers specifically to the company's XPS laptop models that ship with Ubuntu Linux (and not Windows) pre-installed. Ever since, Dell has been producing some of the best Linux "ultrabooks" in recent memory.

Ars has already put the Windows-boasting XPS 13 through its paces earlier this year since the device received a serious overhaul in 2018. Dell bumped up the hardware specs, revamped the thermal system, and introduced a new rose and white version, for instance. But how is latest edition of the premier "just works" Linux laptop doing with the added muscle?